Engineering Fellow Mixed Signal RF Digital Integrated Circuit Design (116635BR)

  • Raytheon
  • Tucson, Arizona, United States
  • 07/02/2018
Secret Engineering - Hardware / Software Project / Program Management

Job Description

Location: Tucson Arizona Security Clearance: Secret
Job Description:

The Subsystem Center in the Engineering Electrical Subsystems Directorate (ESD) is seeking to fill a mixed-signal RF/digital integrated circuit designer technical expert Fellow position. The Fellow is responsible for architecture design of advanced Radio Frequency (RF) Application Specific Integrated Circuits (ASICs). RF ASIC applications include radar, communication links, electronic warfare, and directed energy components and systems. The Fellow should also have substantial experience in designing advanced integrated RF components including power amplifiers, low-noise amplifiers, mixers, switches, phase shifters, detectors, etc., on Silicon Germanium (SiGE) and Complementary Metal-Oxide Semiconductor (CMOS) semiconductor processes. RF frequencies of interest range from less than 1GHz to greater than 100GHz. The Fellow should also have experience in designing digital control/interface circuitry on the same SiGE and/or CMOS processes. The Fellow should have knowledge and experience in the packaging and testing of RF ASICs.

Key responsibilities include, but are not limited to, the following:
  • Develops RF ASIC requirements for new and emerging RF systems as well as ASIC replacements for existing RF circuit designs.
  • Develops RF ASIC circuit designs for new and emerging RF systems as well as ASIC replacements for existing RF circuit designs.
  • Develops test requirements and procedures for new RF ASIC designs.
  • Conceptual development of new configuration and applications of RF ASICs.
  • Assists in the development of RF system requirements
  • Development and writing of proposals.
  • Trains and mentors less-experienced RF ASIC design engineers.
  • Provides technical conscience, challenged with making sure the product and process meet appropriate standards.
  • Ensures balance with risk conditions and constraints while advising leadership Visible and accountable for technical decisions.
  • Primary technical contact with the customer inclusive of requirements, technical commitments, IRAD, future technical needs, etc.
  • Lead IRAD road mapping with RMS including capital strategy.
  • Participate in major review boards such as Engineering Review Board, Failure Review Board, Risk and Opportunity Review Board etc.
  • Communicates and collaborates with Program Management, Product Line Chief Engineer, Functional Management, Operations and Customers.
  • Technically successful bringing a balanced solution within the boundary conditions set by a business solution with Program Manager. The Fellow will engage the Chief Engineer’s Office and the Product Line Chief Engineers.

Required Skills, Experience & Education:
  • Bachelor’s degree in Electrical Engineering, or other technical related field
  • A minimum of 12 years’ experience in RF integrated circuit design
  • Detailed knowledge of multiple RF ASIC layout tools such as Cadence and Advanced Design System (ADS)
  • Responsible for providing guidance, coaching / mentoring and training to other employees across the business within area of expertise.


Desired Skills, Experience & Education:
  • Master’s degree or PhD preferred in Electrical Engineering
  • Currently hold a DoD issued security clearance of Secret or higher (a current investigation is defined as an investigation not older than six years)
  • Nationally known as an expert in the field of RF ASIC design
  • Participant in nationally recognized boards and committees
  • Published papers, and submitted relevant patents
  • Detailed knowledge electromagnetic analysis tools such as High Frequency Structure Simulator (HFSS) and/or Microwave Office
  • Familiarity with GlobalFoundries and Tower Jazz semiconductor processes is desired
  • Design experience in III-V semiconductor processes (e.g. Gallium Arsenide, Gallium Nitride, Indium Phosphide) is a plus
  • Prior active participation in a mentorship or coaching program involving several junior or mid-level engineers

Security Clearance Requirements

This position requires the successful issuance, transfer or maintenance of a Secret security Clearance. Non-US citizens may not be eligible to obtain a security clearance. The Defense Industrial Security Clearance Office (DISCO), an agency of the Department of Defense, handles and adjudicates the security clearance process. Security clearance factors include, but are not limited to, allegiance to the US, foreign influence, foreign preference, criminal conduct, security violations and drug involvement. Additional detail regarding security clearance factors can be obtained by accessing the DISCO website at http://www.dss.mil/psmo-i/indus_psmo-i_interim.html
116635

Raytheon is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, sex, sexual orientation, gender identity, national origin, disability, or protected Veteran status.


Raytheon Missile Systems (RMS) is the world leader in the design, development and production of missile systems for critical requirement including air-to-air, strike, surface Navy air defense, land combat missiles, guided projectiles, exoatmospheric kill vehicles, missile defense and directed energy weapons. RMS is headquartered in Tucson, Arizona with over 11,000 employees operating at sites across the country and internationally. Electrical Engineering, Engineering Technology, All, Engineering Electrical Engineering, Engineering Technology
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